Semiconductor Integration Materials Laboratory
SIM Lab
Semiconductor Integration Materials Laboratory
SIM Lab
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Min Seok Yoo
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Gate structuring on bilayer MoS2 nFET enables ultrahigh current density
EOT-scaled 2D FETs on embedded bottom gates using direct channel growth on 200 mm wafers
200-mm-wafer-scale integration of polycrystalline molybdenum disulfide transistors
Ultraclean Interface of Metal Chalcogenides with Metal through Confined Interfacial Chalcogenization
Wafer-scale integration of transition metal dichalcogenide field-effect transistors using adhesion lithography
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